2005•Unpublished venueRequires access
The Study of PMOS Vth Distribution Using Process and Device Simulations and C-V Measurements
J. Hadzi‐Vukovic, M.M. Jevtić
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Abstract
Measurements of threshold voltage (Vth) of PMOS transistors with buried channel realized in 0.8mum CMOS technology give large spread of the threshold values. To understand the spread of Vthwe use C-V measurements to obtain doping profile in channel region, and process and device simulations to simulate the experimental results. A good agreement between the experimental results and simulation shows that the spread of Vthoriginates from different doping profiles in channel region