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SOA improvement by a double RESURF LDMOS technique in a power IC technology

Velusamy Parthasarathy, Vishnu Khemka, Ronghua Zhu, Adity Bose

Open publisher page 28 citations

Abstract

This paper presents a technique that provides double RESURF action in a lateral power MOSFET controlled through an independently biased terminal thereby realizing a two-fold improvement in electrical static SOA over single RESURF lateral device structures at high drain voltages. The technique has been successfully implemented to realize a high-side capable lateral power MOSFET with BV/sub dss/ of 61 V and specific on-resistance (R/sub dson/A) of 0.54 m/spl Omega/-cm/sup 2/ and with a maximum electrical static operating current of 1.9 A/cm at a drain to source voltage of 54 V.

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What this paper is about

This paper presents a technique that provides double RESURF action in a lateral power MOSFET controlled through an independently biased terminal thereby realizing a two-fold improvement in electrical static SOA over single RESURF lateral device structures at high drain voltages. The technique has been successfully implemented to realize a high-side capable lateral power MOSFET with BV/sub dss/ of 61 V and specific on-resistance (R/sub dson/A) of 0.54 m/spl Omega/-cm/sup 2/ and with a maximum electrical static operating current of 1.9 A/cm at a drain to source voltage of 54 V.

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OpenAlex reports 28 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

This paper presents a technique that provides double RESURF action in a lateral power MOSFET controlled through an independently biased terminal thereby realizing a two-fold improvement in electrical static SOA over single RESURF lateral device structures at high drain voltages. The technique has been successfully implemented to realize a high-side capable lateral power MOSFET with BV/sub dss/ of 61 V and specific on-resistance (R/sub dson/A) of 0.54 m/spl Omega/-cm/sup 2/ and with a maximum electrical static operating current of 1.9 A/cm at a drain to source voltage of 54 V.

Key concepts: LDMOS, Power MOSFET, MOSFET, Power semiconductor device, Electrical engineering, Breakdown voltage, Voltage, Safe operating area

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