Synchronous Finite State Machines

Digital circuits composed of combinational and sequential logic sections are generally described as finite state machines. A machine is synchronous when the state transitions are controlled or synchronized by a clock signal. A machine whose operation is not dependent on a clock signal is said to be asynchronous. The present state (PS) of a state machine is determined by the variables stored in the flip-flops of the sequential section. The next state (NS) of the state machine is defined by the circuit of the combinational logic section. Among finite state machines, one can differentiate between the Moore model and the Mealy model. It must be noted that there are also hybrid machines with some outputs being of Moore type and others of Mealy type. The process of designing finite state machines can, in general, be optimized for certain applications that require minimizing the area occupied by the circuit or the number of components.