Realization and Optimization of H.264 Intra Prediction Based on FPGA

In order to improve intra prediction operation speed and reduce the Field Programmable Gate Array(FPGA) hardware resources consumption.An optimized hardware architecture is proposed for an intra prediction of H.264 based on FPGA.The redundancy of prediction values in the same prediction mode and the parallel processing ability are also fully utilized to optimize hardware architecture.The proposed architecture is implemented in Verilog HDL and verifies that it is effective and practical in Altera Cyclone II EP2C20F484C8 FPGA.