Study of H.264 Intra Prediction Algorithm Based on FPGA
Changjiang Wu
Abstract
Changjiang Wu
Abstract
A parallel implementation based on FPGA is proposed to realize H.264 intra prediction in this paper.In order to reduce the complexity of hardware implementation,the design is divided into some function modules by using the design approach of hiberarchy and modularization.Pipeline and ping-pong operation are used to increase the parallelity,speed and bus utilization rate of the system.All of the modules are designed using Verilog,simulated in Modelsim,synthesized in ISE9.1 and verified to work in Xilinx Spartan3E board.The simulation results indicate that the design meets the real-time requirement.
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A parallel implementation based on FPGA is proposed to realize H.264 intra prediction in this paper.In order to reduce the complexity of hardware implementation,the design is divided into some function modules by using the design approach of hiberarchy and modularization.Pipeline and ping-pong operation are used to increase the parallelity,speed and bus utilization rate of the system.All of the modules are designed using Verilog,simulated in Modelsim,synthesized in ISE9.1 and verified to work in Xilinx Spartan3E board.The simulation results indicate that the design meets the real-time requirement.
Key concepts: ModelSim, Computer science, Field-programmable gate array, Verilog, Pipeline (software), Modular programming, Embedded system, Algorithm