An Efficient BIST Approach for Testing SOC

We describe the implementation of BIST technique,which is applied to enhance the reliability of System-on-a-chip.In order to enhance the reliability of SOC,we adopt the BIST technique for analog modules,which have a complicate logic.For embedded data and program memory,we adopt the MBlST technique.The boundary scan technique to provide a board-level testing and to control BIST logic has been also implemented.