Design of RF LDMOS and High Efficiency Power Amplifier

With the development of the high-speed communications,the characteristics including multi-carrier,broadband have become new directions,so power devices and amplifiers need to be improved with the trend.Based on the improved CMOS process modules,this paper proposes an actual RF LDMOS chip by optimizing its layout.The output power and efficiency of the device at P3dBcompression point at 940 MHz are 52.6dBm and 72% respectively,which are measured by the load-pull system.A 920~960 MHz high-efficiency power amplifier is made based on this measured data.By optimizing the matching circuits,the output power and the efficiency at P1dBcompression point reach 52.7dBm,and 65%separately.The linear gain and efficiency of the amplifier at 8dB backoff point from its saturated output power(Psat)are 18dB and 32.8%respectively.