Realization of high-order FIR filter based on FPGA

Proceeding from the basic structure of FIR digital filter model,the design ideas and the specific implementation of the FIR filter is analyzed,and the distributed algorithm(DA) structure of FIR digital filter is described.Based on nalysis and calculation,a conclusion that a large amount of look-up table(LUT) resources will be consumed when the the common DA structure realizes higher-order filter is achieved.Such a resource consumption even makes the hardware resource can't accept.For these deficiencies of the common DA,an improved DA structure is proposed.The two improved DA structures of 64-order FIR hand-pass filter were simulated with FPGA simulation software.The results show that the improved DA structure significantly reduces consumption of resources,and has obvious advantages in the aspects of reducing the computing resources and improving the performance.