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2010•Journal of Shaanxi University of TechnologyRequires access

CORDIC-based VLSI implement of multiplier

Zhou Hong-an

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Abstract

To solve larger integer multiplication based on CORDIC,the improved measuring method of encoding Z-input on traditional CORDIC algorithm was proposed.The pipeline structure of this CORDIC algorithm and its VHDL code were elucidated.Simulation results were basically in agreement with theoretical value.The improvement on CORDIC algorithm is suitable for FPGA chips to run it.

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What this paper is about

To solve larger integer multiplication based on CORDIC,the improved measuring method of encoding Z-input on traditional CORDIC algorithm was proposed.The pipeline structure of this CORDIC algorithm and its VHDL code were elucidated.Simulation results were basically in agreement with theoretical value.The improvement on CORDIC algorithm is suitable for FPGA chips to run it.

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Available abstract

To solve larger integer multiplication based on CORDIC,the improved measuring method of encoding Z-input on traditional CORDIC algorithm was proposed.The pipeline structure of this CORDIC algorithm and its VHDL code were elucidated.Simulation results were basically in agreement with theoretical value.The improvement on CORDIC algorithm is suitable for FPGA chips to run it.

Key concepts: CORDIC, VHDL, Field-programmable gate array, Multiplier (economics), Pipeline (software), Very-large-scale integration, Computer science, Arithmetic

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