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Design of real-time FFT processing system using double digital signal processor

Jianfeng Lu

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Abstract

In order to meet the requirement of real-time image processing, a system of real-time implementation on Fast Fourier Transform (FFT) is proposed. The system uses two TI’s TMS320C6416 as the core processor and a programmable logical array CPLD for logic control, and applies two field programmable grate arrays (FPGA) to implement image preprocessing and the communication between two DSPs. Experiment results show that the system only takes 178μs to implement one-dimension FFT and iFFT of 1024 dots.

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What this paper is about

In order to meet the requirement of real-time image processing, a system of real-time implementation on Fast Fourier Transform (FFT) is proposed. The system uses two TI’s TMS320C6416 as the core processor and a programmable logical array CPLD for logic control, and applies two field programmable grate arrays (FPGA) to implement image preprocessing and the communication between two DSPs. Experiment results show that the system only takes 178μs to implement one-dimension FFT and iFFT of 1024 dots.

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Available abstract

In order to meet the requirement of real-time image processing, a system of real-time implementation on Fast Fourier Transform (FFT) is proposed. The system uses two TI’s TMS320C6416 as the core processor and a programmable logical array CPLD for logic control, and applies two field programmable grate arrays (FPGA) to implement image preprocessing and the communication between two DSPs. Experiment results show that the system only takes 178μs to implement one-dimension FFT and iFFT of 1024 dots.

Key concepts: Fast Fourier transform, Computer science, Field-programmable gate array, Complex programmable logic device, Digital signal processing, Computer hardware, Preprocessor, Digital signal processor

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