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Design of the motion detection on chip system based on Nios II

Wei Zhao

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Abstract

This article describes a motion detection on chip system based on Nios II core and hardware-software co-design method.In view of the requirements of motion detection,this system implements high speed digital video processing by using HV7131R video processing chips and Altera EP2C35 FPGA with SDRAM and FLASH as the outer memory to store video data.By using Verilog HDL and Nios II custom instruction,the system design improves the processing speed,and the system also has good flexibility and adaptability.

About this research paper

What this paper is about

This article describes a motion detection on chip system based on Nios II core and hardware-software co-design method.In view of the requirements of motion detection,this system implements high speed digital video processing by using HV7131R video processing chips and Altera EP2C35 FPGA with SDRAM and FLASH as the outer memory to store video data.By using Verilog HDL and Nios II custom instruction,the system design improves the processing speed,and the system also has good flexibility and adaptability.

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Available abstract

This article describes a motion detection on chip system based on Nios II core and hardware-software co-design method.In view of the requirements of motion detection,this system implements high speed digital video processing by using HV7131R video processing chips and Altera EP2C35 FPGA with SDRAM and FLASH as the outer memory to store video data.By using Verilog HDL and Nios II custom instruction,the system design improves the processing speed,and the system also has good flexibility and adaptability.

Key concepts: Computer science, Verilog, Field-programmable gate array, Embedded system, Nios II, Computer hardware, Flexibility (engineering), Chip

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