Design of multifunction digital clock based on FPGA

This paper briefly introduces a design scheme of multifunction digital clock based on FPGA.On the basis of achieving basic functions such as timing,adjusting and chronopher,the scheme brings in new world-time function,which can convert Beijing Time to GMT quickly.The design input method of the scheme combines VHDL and block diagram.The digital clock is designed,compiled as well as simulated under QuartusⅡ development environment,and tested on the FPGA hardware development board.The experiment verifies the design scheme,which offers references for the application of FPGA and the design of digital clock.