Huaping Liu
Abstract
A RS decoder for the DVB-C system based on the Matlab simulation of the channel outer coder of DVB-C system is designed.The implementation structure of RS decoder is introduced.Based on the modified Euclidean algorithm,the design is implemented with three pipelined to increase throughput,its feasibility and reliability are verified in the FPGA.
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A RS decoder for the DVB-C system based on the Matlab simulation of the channel outer coder of DVB-C system is designed.The implementation structure of RS decoder is introduced.Based on the modified Euclidean algorithm,the design is implemented with three pipelined to increase throughput,its feasibility and reliability are verified in the FPGA.
Key concepts: Computer science, Digital Video Broadcasting, Field-programmable gate array, MATLAB, Viterbi decoder, Throughput, DVB-T, Soft-decision decoder