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2001•MicroelectronicsOpen access

An Overview of CMOS Cell Layout Generation Algorithms

Qi Ma

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Abstract

WT5”BZ]Cell based ASIC design methodology makes cell layout generation tool essential CMOS cell layout generation consists of transistor placement, inner cell routing and layout compaction In this paper, based on different layout styles, the development of placement, routing and compaction algorithm is reviewed Several cell layout generators are described and problems associated are discussed [WT5HZ]

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What this paper is about

WT5”BZ]Cell based ASIC design methodology makes cell layout generation tool essential CMOS cell layout generation consists of transistor placement, inner cell routing and layout compaction In this paper, based on different layout styles, the development of placement, routing and compaction algorithm is reviewed Several cell layout generators are described and problems associated are discussed [WT5HZ]

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Available abstract

WT5”BZ]Cell based ASIC design methodology makes cell layout generation tool essential CMOS cell layout generation consists of transistor placement, inner cell routing and layout compaction In this paper, based on different layout styles, the development of placement, routing and compaction algorithm is reviewed Several cell layout generators are described and problems associated are discussed [WT5HZ]

Key concepts: Standard cell, Integrated circuit layout, Application-specific integrated circuit, Routing (electronic design automation), CMOS, Page layout, IC layout editor, Physical design

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