Extraction of the LDMOS Transistor's Shunt Capacitance and Design of Class-E Power Amplifiers
Yingjie Xu
Abstract
Yingjie Xu
Abstract
This paper presents a 2.14 GHz high efficiency class-E power amplifier based on LDMOS transistors.Using the parallel resonant method,the key parameter Cds of the transistor is extracted by simulation on ADS.Based on this parameter,feed network and load network are designed to reduce harmonics.Finally,the experimental result is given and matches with simulation data.It gives an output power of 38.55 dBm with a power-added efficiency of 64.1%.
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This paper presents a 2.14 GHz high efficiency class-E power amplifier based on LDMOS transistors.Using the parallel resonant method,the key parameter Cds of the transistor is extracted by simulation on ADS.Based on this parameter,feed network and load network are designed to reduce harmonics.Finally,the experimental result is given and matches with simulation data.It gives an output power of 38.55 dBm with a power-added efficiency of 64.1%.
Key concepts: LDMOS, Transistor, Amplifier, Transistor model, Harmonics, Capacitance, Electronic engineering, Electrical engineering