Digital clock design based on the hardware description language(VHDL)

VHDL can be used to describe,simulate and design digital system automatically.Nowadays,it becomes a key technology in automatic electronic design.There is a lot of superiority in this description language.This article introduces the method and the process using VHDL to design a digital system by an example of digital clock design.The result given in this paper shows that VHDL is one of the strongest tools in hardware description and it is a flexible among the design method.The method given in this paper can reduce the difficulty of digital system design and improve the work efficiency.