Design of FSM simulation for I~2C bus based on FPGA

According to I2C bus communication protocol,this paper introduced design of the I2C bus by FSM based on FPGA.It mainly includes the brief introduction of the characteristic of I2C bus,the design ideas and implementation process for I2C bus based on FPGA.Then it share and explanation some program of initialization for SAA7111 and SAA7121 in Verilog HDL.Finally timing simulation under master-slave in QuartusII was done,and debugging by SignalTapII on hardware was completed successfully.