2013Electronic Design EngineeringRequires access

Control circuit design of high speed USB data acquisition system based on FPGA

Feng Zhi-hu

Open publisher page 0 citations

Abstract

In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.

About this research paper

What this paper is about

In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.

Key concepts: USB, FIFO (computing and electronics), Field-programmable gate array, Computer hardware, Interface (matter), Computer science, Data acquisition, Embedded system

Related papers

Back to paper searchBrowse research topicsOriginal source
Control circuit design of high speed USB data acquisition system based on FPGA — Research Paper | ScholarLens