Control circuit design of high speed USB data acquisition system based on FPGA
Feng Zhi-hu
Abstract
Feng Zhi-hu
Abstract
In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.
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In order to satisfy the high speed dynamic signal real-time record of the collection of requirements, design and implement a 14 bit 、65 MHz high-speed data sampling system.based on FPGA and USB2.0 interface, This system with FPGA as core digital signal processing, through the effective control of FPGA of acquisition system, realizes the data string and convert, AD interface data FIFO buffer, SDRAM read data storage and display, and other functions, and in the system under control through USB2.0 bus communication interface to realize the data interaction between upper machine and high speed.This system completed the related design and through the acceptance, and successfully applied to the model in the project.
Key concepts: USB, FIFO (computing and electronics), Field-programmable gate array, Computer hardware, Interface (matter), Computer science, Data acquisition, Embedded system