2009Experiment Science and TechnologyRequires access

DDS+PLL Frequency Synthesizer Based on AD9858

Yuanyuan Xu

Open publisher page 0 citations

Abstract

Phase locked loop and direct digital frequency synthesis technology have their merits and disadvantages respectively,so it is feasible to combine the 2 methods,perform their merits and to overcome their disadvantages,which can generate wideband and super wideband radar signal expected,and it puts up with design scheme and main hardware circuit design. In the design,with AD9858 as the core device,output of DDS is used to stimulate PLL,namely DDS provides the reference signal of PLL,with ADF4107 as the phase detector of PLL. Then FPGA controls conveniently DDS and PLL by procedures. As a result,the output signal has the fast conversion time,phase noise of which is -90 dBc/Hz,and the spur of which is better than -70 dBc. So this system has a high-performance aggregative indicator.

About this research paper

What this paper is about

Phase locked loop and direct digital frequency synthesis technology have their merits and disadvantages respectively,so it is feasible to combine the 2 methods,perform their merits and to overcome their disadvantages,which can generate wideband and super wideband radar signal expected,and it puts up with design scheme and main hardware circuit design. In the design,with AD9858 as the core device,output of DDS is used to stimulate PLL,namely DDS provides the reference signal of PLL,with ADF4107 as the phase detector of PLL. Then FPGA controls conveniently DDS and PLL by procedures. As a result,the output signal has the fast conversion time,phase noise of which is -90 dBc/Hz,and the spur of which is better than -70 dBc. So this system has a high-performance aggregative indicator.

Why it matters

A significance statement is not available in the OpenAlex record.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Phase locked loop and direct digital frequency synthesis technology have their merits and disadvantages respectively,so it is feasible to combine the 2 methods,perform their merits and to overcome their disadvantages,which can generate wideband and super wideband radar signal expected,and it puts up with design scheme and main hardware circuit design. In the design,with AD9858 as the core device,output of DDS is used to stimulate PLL,namely DDS provides the reference signal of PLL,with ADF4107 as the phase detector of PLL. Then FPGA controls conveniently DDS and PLL by procedures. As a result,the output signal has the fast conversion time,phase noise of which is -90 dBc/Hz,and the spur of which is better than -70 dBc. So this system has a high-performance aggregative indicator.

Key concepts: Phase-locked loop, PLL multibit, dBc, Direct digital synthesizer, Frequency synthesizer, Phase noise, Electronic engineering, Wideband

Related papers

Back to paper searchBrowse research topicsOriginal source
DDS+PLL Frequency Synthesizer Based on AD9858 — Research Paper | ScholarLens