Implementation of Nios II Embedded Processor in the Control System of SDR Platform

A SOPC system based on Nios Ⅱ embedded processor have been set up in the Altera Cyclone Ⅱ series FPGA. Using the SOPC system we have successfully controlled and downloaded parameters to the DDC and DUC chip in the SDR platform based on the IF sampling theory. The result shows the SOPC system can control the target conveniently within less FPGA resource and periph-eral devices.