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Gigabit Ethernet Data Transmission Design Based on FPGA

Yuan Yan

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Abstract

To solve the problem of how to use,using The Altera Cyclone Ⅳ series FPGA is adopted as the embedded development platform to implement the TCP/IP protocol using Nios Ⅱ which is a soft core processor for high speed gigabit Ethernet access. Tests on the designed Gigabit Ethernet transmission scheme indicate that the transmission data can be received and transmitted correctly with a high transmitting efficiency.

About this research paper

What this paper is about

To solve the problem of how to use,using The Altera Cyclone Ⅳ series FPGA is adopted as the embedded development platform to implement the TCP/IP protocol using Nios Ⅱ which is a soft core processor for high speed gigabit Ethernet access. Tests on the designed Gigabit Ethernet transmission scheme indicate that the transmission data can be received and transmitted correctly with a high transmitting efficiency.

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Method / approach

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Available abstract

To solve the problem of how to use,using The Altera Cyclone Ⅳ series FPGA is adopted as the embedded development platform to implement the TCP/IP protocol using Nios Ⅱ which is a soft core processor for high speed gigabit Ethernet access. Tests on the designed Gigabit Ethernet transmission scheme indicate that the transmission data can be received and transmitted correctly with a high transmitting efficiency.

Key concepts: Gigabit Ethernet, Field-programmable gate array, Synchronous Ethernet, Computer science, ATA over Ethernet, Embedded system, Carrier Ethernet, Ethernet flow control

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