Sun Xiao
Abstract
A new Viterbi decoder with a high rate and parallel structure was presented. A new survivor memory and decoding output (SMDO) method presented was used to implement the new structure. An FPGA based Viterbi decoder was obtained. On the basis of the results of simulations, its advantages in decoding speed and time delay was shown as well.
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A new Viterbi decoder with a high rate and parallel structure was presented. A new survivor memory and decoding output (SMDO) method presented was used to implement the new structure. An FPGA based Viterbi decoder was obtained. On the basis of the results of simulations, its advantages in decoding speed and time delay was shown as well.
Key concepts: Viterbi decoder, Soft-decision decoder, Viterbi algorithm, Soft output Viterbi algorithm, Computer science, Field-programmable gate array, Decoding methods, Iterative Viterbi decoding