2016•International Journal of Engineering Research andRequires access

Implementation of High Speed Viterbi Decoder using FPGA

Amruta J. Mandwale, Altaf O. Mulani

Open publisher page 5 citations

Abstract

This record does not include an abstract. Use the full-text link above if available.

About this research paper

What this paper is about

An abstract is not available in the OpenAlex record for this paper.

Why it matters

OpenAlex reports 5 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Key concepts: Viterbi decoder, Field-programmable gate array, Computer science, Soft output Viterbi algorithm, Soft-decision decoder, Viterbi algorithm, Parallel computing, Computer hardware

Back to paper search Browse research topics Original source

Implementation of High Speed Viterbi Decoder using FPGA — Research Paper | ScholarLens