2013Modern Electronics TechniqueRequires access

Design and implementation of FIR digital filter based on FPGA

Wenhua Li

Open publisher page 4 citations

Abstract

The structure feature and the basic principle of FIR digital filter is introduced briefly.The basic design process and implementation scheme of the FIR digital filter based on FPGA and DSP Builder is proposed in this paper.FIR model is structured with DSP Builder module in the Matlab/Simulink environment.The FIR digital filter is designed according to the FDATool.The system level simulation and ModelSim function simulation were completed.The simulation results show that the filter has excellent effect.The model is converted to VHDL language through SingalCompiler and added to FPGA hardware design.The real time waveform graph of the FIR digital filter was received by the virtual logic analysis tool SignalTapⅡ in QuartusⅡ.The results conform to the expected requirement.

About this research paper

What this paper is about

The structure feature and the basic principle of FIR digital filter is introduced briefly.The basic design process and implementation scheme of the FIR digital filter based on FPGA and DSP Builder is proposed in this paper.FIR model is structured with DSP Builder module in the Matlab/Simulink environment.The FIR digital filter is designed according to the FDATool.The system level simulation and ModelSim function simulation were completed.The simulation results show that the filter has excellent effect.The model is converted to VHDL language through SingalCompiler and added to FPGA hardware design.The real time waveform graph of the FIR digital filter was received by the virtual logic analysis tool SignalTapⅡ in QuartusⅡ.The results conform to the expected requirement.

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Available abstract

The structure feature and the basic principle of FIR digital filter is introduced briefly.The basic design process and implementation scheme of the FIR digital filter based on FPGA and DSP Builder is proposed in this paper.FIR model is structured with DSP Builder module in the Matlab/Simulink environment.The FIR digital filter is designed according to the FDATool.The system level simulation and ModelSim function simulation were completed.The simulation results show that the filter has excellent effect.The model is converted to VHDL language through SingalCompiler and added to FPGA hardware design.The real time waveform graph of the FIR digital filter was received by the virtual logic analysis tool SignalTapⅡ in QuartusⅡ.The results conform to the expected requirement.

Key concepts: ModelSim, Field-programmable gate array, VHDL, Finite impulse response, Computer science, Digital signal processing, Computer hardware, Filter (signal processing)

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