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A DC-Model for Simulation of NMOS ESD Protection Device

Yang Dian-xion

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Abstract

A practical DC model for simulation of ESD NMOS is presented. Models for MOS transistor based on BSIM 3V3, bipolar transistor for parasitic effect, substrate resistance and series resistance are provided. Studies have been done on the snapback and parasitic bipolar action for modeling ESD NMOS. Equations for modeling the high current behavior of NMOS transistor have been developed. Extraction methodology for obtaining the bipolar parameters is given. Simulation results are presented and compared to the experiment data.

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What this paper is about

A practical DC model for simulation of ESD NMOS is presented. Models for MOS transistor based on BSIM 3V3, bipolar transistor for parasitic effect, substrate resistance and series resistance are provided. Studies have been done on the snapback and parasitic bipolar action for modeling ESD NMOS. Equations for modeling the high current behavior of NMOS transistor have been developed. Extraction methodology for obtaining the bipolar parameters is given. Simulation results are presented and compared to the experiment data.

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Available abstract

A practical DC model for simulation of ESD NMOS is presented. Models for MOS transistor based on BSIM 3V3, bipolar transistor for parasitic effect, substrate resistance and series resistance are provided. Studies have been done on the snapback and parasitic bipolar action for modeling ESD NMOS. Equations for modeling the high current behavior of NMOS transistor have been developed. Extraction methodology for obtaining the bipolar parameters is given. Simulation results are presented and compared to the experiment data.

Key concepts: NMOS logic, Snapback, Electrostatic discharge, Computer science, Transistor, Bipolar junction transistor, Electrical engineering, Electronic engineering

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