Logic Design for Bus Interface of MCS-51 Microprocessor and FPGA/CPLD

Design a type of Bus Interface logic based on MCS-51 microprocessor and FPGA/CPLD,to realize the reliable communication between the microprocessor and the PLD ,and to combine the PLD and microprocessor, with the purpose of forming a controlling system in which software and hardware can be both programmed with fieldwork. In this way, they can make up each other's advantages. VHDL lan-guage is applied in this design, to realize the Bus Interface logic design of MCS-51 microprocessor and FPGA/CPLD. The experiments proved that this interface works stably and reliably, and can enable the MCS-51 microprocessor and FPGA/CPLD to combine perfectly.