Design of RS232 asynchronous serial port IP-core based on FPGA

In order to enhance the stability of the system and reduce the board area,an asynchronous serial IP core design is proposed based on FPGA.VHDL hardware description language has been used for sending and receiving module design.The design has been simulated in the Xilinx ISE environment.Finally,the UART IP core is embedded in FPGA to realize the asynchronous serial communication function.This IP core is modularity,compatibility and configurable.According to the need of function,the system design can realize upgrade,expansion and cuts.