Yizheng Ye
Abstract
SystemC is a new hardware design language which is suitable for SoC top-level design,and SystemC verification library is an independent library to improve the verification capability.SystemC and SystemC library are described in this paper,and special emphasis is on random verification with SystemC library.
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SystemC is a new hardware design language which is suitable for SoC top-level design,and SystemC verification library is an independent library to improve the verification capability.SystemC and SystemC library are described in this paper,and special emphasis is on random verification with SystemC library.
Key concepts: SystemC, Computer science, Electronic system-level design and verification, Computer architecture, Embedded system, Transaction-level modeling