Design of DDS IP core based on FPGA
Jianping Shi
Abstract
Jianping Shi
Abstract
The method of developing DDS IP core based on FPGA is studied in this paper making use of development tools Quartus II 7.2 of Altera company,the simulation result is also given.Taking Nios II soft-core as a CPU and combining a DDS IP core that is encapsulated in SOPC Builder component,a system on programmable chip(SOPC) is built to realize a signal generator.Most of the functions are completed in the FPGA,using SOPC technology to design hardware development platform of signal generator with only one FPGA chip so as to simplify design and to develop the stability and reliability of the system.
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The method of developing DDS IP core based on FPGA is studied in this paper making use of development tools Quartus II 7.2 of Altera company,the simulation result is also given.Taking Nios II soft-core as a CPU and combining a DDS IP core that is encapsulated in SOPC Builder component,a system on programmable chip(SOPC) is built to realize a signal generator.Most of the functions are completed in the FPGA,using SOPC technology to design hardware development platform of signal generator with only one FPGA chip so as to simplify design and to develop the stability and reliability of the system.
Key concepts: Field-programmable gate array, Nios II, Embedded system, System on a chip, Reliability (semiconductor), Computer science, Chip, Computer hardware