Implementation of Integrated Wideband Σ-Δ Fractional-N Frequency Synthesizer

A novel low noise and wideband fractional-N frequency synthesizer was presented,in which a 3-bit third-order sigma-delta modulator and a controllable switched capacitor LC VCO were used.The control signals were generated by a 4-bit two-stage pipelined ADC.The synthesizer was fabricated in 0.25 μm CMOS process.Test results showed that the circuit had an in-band and an out-of-band phase noise of about-86.2 dBc/Hz and-130 dBc/Hz at 10 kHz and 2 MHz offset frequencies,respectively,and the frequency resolution for the synthesizer was less than 5 Hz.