Design of digital radar universal signal processor
Zengping Chen
Abstract
Zengping Chen
Abstract
This paper introduces a digital radar universal signal processor,which adopts 4 chips of TS201S as central processor and one chip of Virtex-5 series FPGA as coprocessor and interface controller.Through the reasonable design of bus structure,choosing high speed serial interface and using high speed circuit simulation technique,the processor owns the characteristics of good capability of data processing and alternation,excellent universality,recontructable performance and expansibility.The processor has been tested with real-time ISAR imaging and digital beam forming(DBF).The testing result shows its good performance and practicability.
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This paper introduces a digital radar universal signal processor,which adopts 4 chips of TS201S as central processor and one chip of Virtex-5 series FPGA as coprocessor and interface controller.Through the reasonable design of bus structure,choosing high speed serial interface and using high speed circuit simulation technique,the processor owns the characteristics of good capability of data processing and alternation,excellent universality,recontructable performance and expansibility.The processor has been tested with real-time ISAR imaging and digital beam forming(DBF).The testing result shows its good performance and practicability.
Key concepts: Computer science, Digital signal processor, Coprocessor, Field-programmable gate array, Computer hardware, Media processor, Radar, Interface (matter)