2013•北京理工大学学报：英文版Requires access

Low spurious noise frequency synthesis based on a DDS-driven wideband PLL architecture

王红玉, 王昊飞, 任丽香, 毛二可

Abstract

An S-band frequency synthesizer for a stepped-frequency radar is presented.This frequency synthesizer is based on a direct digital synthesizer(DDS)-driven wideband phase-locked loop(PLL)architecture which can achieve low spurious noise and rapid frequency hopping simultaneously.The mechanism of introducing high level spurs by the images of DDS digital to analog convertor(DAC)output is analyzed.A novel DDS frequency planning method is proposed to ensure low colored noise within the entire bandwidth.The designed output frequency range is 3.765-4.085GHz,and the step size is 5MHz with frequency agility of less than 1μs.Measured results demonstrate that the average spurious free dynamic range(SFDR)is about 64dBc in a 320MHz bandwidth.

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Key concepts: Spurious-free dynamic range, Direct digital synthesizer, Frequency synthesizer, Wideband, Spurious relationship, Phase-locked loop, Phase noise, Bandwidth (computing)