2015•Unpublished venueRequires access

A fast-switching low-spurious 6–18 GHz hybrid frequency synthesizer

Soumyadeep Biswas, V. Revathi

Open publisher page 7 citations

Abstract

A 6-18 GHz wideband frequency synthesizer with 100 kHz frequency resolution using hybrid Direct Digital Synthesizer (DDS) and Phase Locked Loop (PLL) architecture is presented in this paper. The DDS is used as a reference to the PLL multiplier to extend the frequency range. To achieve fast frequency switching from the overall architecture the PLL is optimized with wide loop bandwidth. But the compromise in doing so is the insufficient rejection of the high close-in DDS spurs by the loop filter. A low spurious noise is achieved in this design by avoiding the bands of DDS frequencies with close-in spurs less than the PLL loop bandwidth using alternate DDS frequencies and consecutive PLL division ratios. Maximum switching time of 6 us and spur levels less than -50 dBc is achieved from the developed module. This module can be used as frequency-agile Local Oscillator (LO) in wideband microwave receivers.

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What this paper is about

A 6-18 GHz wideband frequency synthesizer with 100 kHz frequency resolution using hybrid Direct Digital Synthesizer (DDS) and Phase Locked Loop (PLL) architecture is presented in this paper. The DDS is used as a reference to the PLL multiplier to extend the frequency range. To achieve fast frequency switching from the overall architecture the PLL is optimized with wide loop bandwidth. But the compromise in doing so is the insufficient rejection of the high close-in DDS spurs by the loop filter. A low spurious noise is achieved in this design by avoiding the bands of DDS frequencies with close-in spurs less than the PLL loop bandwidth using alternate DDS frequencies and consecutive PLL division ratios. Maximum switching time of 6 us and spur levels less than -50 dBc is achieved from the developed module. This module can be used as frequency-agile Local Oscillator (LO) in wideband microwave receivers.

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Available abstract

A 6-18 GHz wideband frequency synthesizer with 100 kHz frequency resolution using hybrid Direct Digital Synthesizer (DDS) and Phase Locked Loop (PLL) architecture is presented in this paper. The DDS is used as a reference to the PLL multiplier to extend the frequency range. To achieve fast frequency switching from the overall architecture the PLL is optimized with wide loop bandwidth. But the compromise in doing so is the insufficient rejection of the high close-in DDS spurs by the loop filter. A low spurious noise is achieved in this design by avoiding the bands of DDS frequencies with close-in spurs less than the PLL loop bandwidth using alternate DDS frequencies and consecutive PLL division ratios. Maximum switching time of 6 us and spur levels less than -50 dBc is achieved from the developed module. This module can be used as frequency-agile Local Oscillator (LO) in wideband microwave receivers.

Key concepts: Phase-locked loop, Direct digital synthesizer, Frequency synthesizer, PLL multibit, Phase noise, Wideband, Frequency multiplier, Electronic engineering

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