Low voltage bulk-driven CMOS inverter with lower delays
Maneesha Gupta, Bhawna Aggarwal, Priyanka Garg, Parish Aggarwal, Swati Jain
Abstract
Maneesha Gupta, Bhawna Aggarwal, Priyanka Garg, Parish Aggarwal, Swati Jain
Abstract
In this paper, a low voltage bulk-driven CMOS inverter capable of operating at power supplies of ±0.9V using standard CMOS technologies is proposed. The proposed inverter gives not only smoother transient response with a lower delay, but also a sharper fall from high to low than its gate-driven counterpart. The proposed bulk-driven inverter is analysed for various regions of operation and simulated results using SPICE in 0.35μm CMOS technology are shown to demonstrate the effectiveness of the circuit.
OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
In this paper, a low voltage bulk-driven CMOS inverter capable of operating at power supplies of ±0.9V using standard CMOS technologies is proposed. The proposed inverter gives not only smoother transient response with a lower delay, but also a sharper fall from high to low than its gate-driven counterpart. The proposed bulk-driven inverter is analysed for various regions of operation and simulated results using SPICE in 0.35μm CMOS technology are shown to demonstrate the effectiveness of the circuit.
Key concepts: CMOS, Inverter, Spice, Electronic engineering, Transient (computer programming), Voltage, Logic gate, Electrical engineering