Design and Implementation of Adder for Modulo 2 n +1 Addition

Two architectures for modulo 2 n +1 adders are introduced in this paper.The first one is built around a sparse carry computation unit that computes only some of the carries of the modulo 2 n +1 addition.This sparse approach is enabled by the introduction of the inverted circular idem potency property of the parallelprefix carry operator and its regularity and area efficiency are further enhanced by the introduction of a new prefix operator.The resulting diminished-1 adders can be implemented in smaller area and consume less power compared to all earlier proposals, while maintaining a high operation speed.The second architecture unifies the design of modulo 2 n ±1 adders.It is shown that modulo 2 n +1 adders can be easily derived by straightforward modifications of modulo 2 n -1 adders with minor hardware overhead. I. Introduction:Arithmetic modulo 2 n+1 has found applicability in a variety of fields ranging from pseudorandom number generation and cryptography up to convolution computations without round-off errors.Also modulo 2 n+1 operator are commonly included in residue number system (RNS) applications.The RNS is an arithmetic system which decomposes a number into parts (residues) and performs arithmetic operations in parallel for each residue without the need of carry propagation among them, leading to significant speedup over the corresponding binary operations.RNS is well suited to applications that are rich of addition/subtraction and multiplication operations and has been adopted in the design of digital signal processors FIR filters and communication components offering in several cases apart from enhanced operation speed, low-power characteristics We shall also briery discuss one other unconventional number system that has found some practical use in computer arithmetic; this is the redundant 1 signed-digit number system.We have two objectives in these preliminary discussions.The first is to facilitate a contrast between RNS and commonly used number systems.The second is to to recall a few basic properties of the conventional number systems, as ultimately, it is these that form the basis of implementations of residue arithmetic.The sub sequent introduction to RNS consists of some basic definitions, a discussion of certain desirable features of a residue number system, and a discussion of the basic arithmetic operations.For reducing the area complexity of the parallel-prefix solutions, select-prefix and circular carry select IEAC adders have been proposed.Unfortunately, both these proposals achieve a smaller operating speed than the parallel-prefix ones.Recently, very fast IEAC adders that use the Ling carry formulation of parallel-prefix addition have appeared in that also suffer from the requirement of a double parallel-prefix computation tree.