Design and Performance Analysis of Various Multipliers using Verilog HDL

In the domain of VLSI design, the multipliers have play an vital role. Multipliers are the basic building blocks of digital design. Multipliers are used in Digital Signal Processing applications (DSP) such as Fast Fourier Transform (FFT), Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) filters. In this paper, the design of various multipliers such as Array Multiplier (AM), Modified Radix-2 booth multiplier (MRBM), Ripple Carry Multiplier (RCM) with Row bypassing, Wallace Tree Multiplier (WT), Dadda Multiplier (DM) and Vedic Multiplier (VM) are discussed and their performance parameters such as area and delay are determined and compared. The various multipliers are designed using Verilog HDL. Then, they are simulated and synthesized using Xilinx ISE 13.2 for Virtex-6 family device with a speed grade of -2.