Role of driver and load transistor (MOSFET) parameters on pseudo-NMOS logic design

The pseudo-NMOS logic can be used in special applications to perform special logic function. The pseudo- NMOS logic is based on designing pseudo-NMOS inverter which functions as a digital switch. During the design phase of pseudo-NMOS inverters and logic gates based on MOS technologies, it is necessary to take into consideration many parameters which characterise MOS transistors, which impact static and dynamic performances of the different logic gates. The aim of this paper is to research impact the NMOS (driver) and PMOS (active load) transistors parameters during the design phase of pseudo-NMOS inverters and in design phase pseudo-NMOS logic gates for different work cases. The results obtained emphasize the impact of each single parameter of MOSFET transistor at the low output level state, at the level values of static current at output, on the shape of the voltage transfer characteristic in the pseudo-NMOS inverter, on propagation delays during transition logic state, and impact in pseudo-NMOS logic gates. By adjusting the parameters values of NMOS and PMOS transistor it's possible to design pseudo-NMOS inverters and pseudo-NMOS logic gate which will have acceptable performance depending on designers' requests.