Fabrication and Characterization of Self-Aligned Recessed Channel SOI NMOSFETs

A new SOI NMOSFET with a 'LOCOS-like' shape self-aligned polysilicon gate formed on the recessed channel region has been fabricated by a mix-and-match technology. For the first time, a new scheme for implementing self-alignment in both source / drain and gate structure in recessed channel device fabrication was tried. Symmetric source / drain doping profile was obtained and highly symmetric electrical characteristics were observed. Drain current measured from 0.3 ㎛ SOI devices with V_T of 0.77 V and Tax = 7.6 nm is 360 ㎂/㎛ V_(GS)=3.5V and V_(DS)=2.5 V. Improved breakdown characteristics were obtained and the BV_(DSS) (the drain voltage for 1㎁/㎛ of I_D at V_(GS) = 0 V) of the device with L_(eff) = 0.3㎛ under the floating body condition was as high as 3.7 V. Problems for the new scheme are also addressed and more advanced device structure based on the proposed scheme is proposed to solve the problems.