ANALYSIS OF DIFFERENT BIT CARRY LOOK AHEAD ADDER USING VERILOG CODE

Adders are one of the widely used digital components in digital integrated circuit design. In this paper, various adder structures can be used to execute addition such as serial and parallel structures and most of researches have done research on the design of high-speed, low-area, or lowpower adders. Adders like ripple carry adder, carry select adder, carry look ahead adder, carry skip adder, carry save adder [2] exist numerous adder implementations each with good attributes and some drawbacks. This paper focuses on the implementation and simulation of 4-bit, 8-bit and 16-bit carry look-ahead adder based on Verilog code [3] and compared for their performance in Xilinx [1]. We have recorded the performance improvements in propagating the carry and generating the sum when compared with the traditional carry look ahead adder designed in the same technology [4] [5].