2013•Zenodo (CERN European Organization for Nuclear Research)Open access

Design And Performance Analysis Of Various Adders Using Verilog

Maroju SaiKumar, Dr. P. Samundiswary

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Abstract

Adders are one of the most widely digital components in the digital integrated circuit design and are the necessary part of Digital Signal Processing (DSP) applications. With the advances in technology, researchers have tried and are trying to design adders which offer either high speed, low power consumption, less area or the combination of them. In this paper, the design of various adders such as Ripple Carry Adder (RCA), Carry Skip Adder (CSkA), Carry Increment Adder (CIA), Carry Look Ahead Adder (CLaA), Carry Save Adder (CSA), Carry Select Adder (CSlA), Carry Bypass Adder (CByA) are discussed and the performance parameters of adders such as area and delay are determined and compared. Various adders are designed using Verilog HDL. Then, they are simulated and synthesized using Xilinx ISE 13.2 for Virtex-6 family device with speed grade -2.

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What this paper is about

Adders are one of the most widely digital components in the digital integrated circuit design and are the necessary part of Digital Signal Processing (DSP) applications. With the advances in technology, researchers have tried and are trying to design adders which offer either high speed, low power consumption, less area or the combination of them. In this paper, the design of various adders such as Ripple Carry Adder (RCA), Carry Skip Adder (CSkA), Carry Increment Adder (CIA), Carry Look Ahead Adder (CLaA), Carry Save Adder (CSA), Carry Select Adder (CSlA), Carry Bypass Adder (CByA) are discussed and the performance parameters of adders such as area and delay are determined and compared. Various adders are designed using Verilog HDL. Then, they are simulated and synthesized using Xilinx ISE 13.2 for Virtex-6 family device with speed grade -2.

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Available abstract

Adders are one of the most widely digital components in the digital integrated circuit design and are the necessary part of Digital Signal Processing (DSP) applications. With the advances in technology, researchers have tried and are trying to design adders which offer either high speed, low power consumption, less area or the combination of them. In this paper, the design of various adders such as Ripple Carry Adder (RCA), Carry Skip Adder (CSkA), Carry Increment Adder (CIA), Carry Look Ahead Adder (CLaA), Carry Save Adder (CSA), Carry Select Adder (CSlA), Carry Bypass Adder (CByA) are discussed and the performance parameters of adders such as area and delay are determined and compared. Various adders are designed using Verilog HDL. Then, they are simulated and synthesized using Xilinx ISE 13.2 for Virtex-6 family device with speed grade -2.

Key concepts: Adder, Verilog, Computer science, Computer architecture, Embedded system, Field-programmable gate array, Telecommunications, Latency (audio)

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