Proposed Hybrid Memory Using Dram and Pcm to Attain Better Performance

Computer system architecture is a combination of processor, different levels of memory and peripheral devices. The memory in a computer determines the stability and efficiency. The different layers of the memory hierarchy can be distinguished by the response time and potentiality to withstand the data. The upper layer of the hierarchy is the main memory, which is expected to be fast, non volatile and should able to withstand higher number of write cycles. DRAMS are being used currently, which fails in the case of non volatility. Hence the research on non-volatile memories is at full swing. The introduction of PCM (phase change memory) is considered to be a major achievement in non volatile memory. But the major drawback with PCM is the lesser life time or ability to withstand minimal number of write cycles, longer write time and high power utilization during writes. This paper proposes an architectural framework to exploit the best out of both memories, in which PCM will share the load of the DRAM. This proposed architecture will deliver the expected main memory layer with higher speed, non volatile nature and higher lifetime.