Geometrical parameters influence on the Hall effect sensors offset and drift
Maria-Alexandra Pãun, Jean-Michel Sallèse, Maher Kayal
Abstract
Maria-Alexandra Pãun, Jean-Michel Sallèse, Maher Kayal
Abstract
Several Hall sensor configurations have been integrated in CMOS technology and analyzed in terms of offset at room temperature and offset drift. We looked for the best geometry that would minimize the offset and its drift. The targeted specification was ±30 μT for offset at room temperature and ±0.3 μT/°C for the drift. The measurement setup developed allows a clean, reliable and fast analysis of a high number of the same type of cell, located on different positions on the chip. Geometrical correction factor maximization was also performed for small sensing contacts Hall structures in order to ensure maximum sensitivity.
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Several Hall sensor configurations have been integrated in CMOS technology and analyzed in terms of offset at room temperature and offset drift. We looked for the best geometry that would minimize the offset and its drift. The targeted specification was ±30 μT for offset at room temperature and ±0.3 μT/°C for the drift. The measurement setup developed allows a clean, reliable and fast analysis of a high number of the same type of cell, located on different positions on the chip. Geometrical correction factor maximization was also performed for small sensing contacts Hall structures in order to ensure maximum sensitivity.
Key concepts: Offset (computer science), Hall effect sensor, CMOS, Hall effect, Maximization, Chip, Electronic engineering, Electrical engineering