2010IEEE Transactions on Advanced PackagingRequires access

Design of a Controllable Delay Line

Ali Reza Kabiri, Qing He, Mohammed H. Kermani, Omar Mustafa Ramahi

Open publisher page 23 citations

Abstract

Delay lines are used in printed circuit boards (PCBs) to produce delay between two points (or devices) while occupying as little board space as possible. As higher clock frequency is used in circuits, electromagnetic coupling between adjacent traces of delay line increases. The coupling that takes place between all the parallel adjoining traces combines synchronously or asynchronously to cause dispersion. Consequently, simple analytic techniques that predict delay line behavior are ineffective to predict precise delay and costly full-wave modeling or measurement becomes essential. In this paper, we consider microstrip meander delay lines and study the effect of the number of segments on resulting delay using full-wave modeling and measurement. We show that for short segments and when the number of segments is large enough, the resulting delay per segment is almost uniform and does not change as the number of segments increases. We show a linear relationship between the number of segments and the total delay, thus allowing for simple delay line design without the prohibitive cost of full-wave three-dimensional modeling of the entire delay line structure. Demonstration of these findings is supported by numerical simulations and experimental measurement.

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What this paper is about

Delay lines are used in printed circuit boards (PCBs) to produce delay between two points (or devices) while occupying as little board space as possible. As higher clock frequency is used in circuits, electromagnetic coupling between adjacent traces of delay line increases. The coupling that takes place between all the parallel adjoining traces combines synchronously or asynchronously to cause dispersion. Consequently, simple analytic techniques that predict delay line behavior are ineffective to predict precise delay and costly full-wave modeling or measurement becomes essential. In this paper, we consider microstrip meander delay lines and study the effect of the number of segments on resulting delay using full-wave modeling and measurement. We show that for short segments and when the number of segments is large enough, the resulting delay per segment is almost uniform and does not change as the number of segments increases. We show a linear relationship between the number of segments and the total delay, thus allowing for simple delay line design without the prohibitive cost of full-wave three-dimensional modeling of the entire delay line structure. Demonstration of these findings is supported by numerical simulations and experimental measurement.

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Available abstract

Delay lines are used in printed circuit boards (PCBs) to produce delay between two points (or devices) while occupying as little board space as possible. As higher clock frequency is used in circuits, electromagnetic coupling between adjacent traces of delay line increases. The coupling that takes place between all the parallel adjoining traces combines synchronously or asynchronously to cause dispersion. Consequently, simple analytic techniques that predict delay line behavior are ineffective to predict precise delay and costly full-wave modeling or measurement becomes essential. In this paper, we consider microstrip meander delay lines and study the effect of the number of segments on resulting delay using full-wave modeling and measurement. We show that for short segments and when the number of segments is large enough, the resulting delay per segment is almost uniform and does not change as the number of segments increases. We show a linear relationship between the number of segments and the total delay, thus allowing for simple delay line design without the prohibitive cost of full-wave three-dimensional modeling of the entire delay line structure. Demonstration of these findings is supported by numerical simulations and experimental measurement.

Key concepts: Microstrip, Delay calculation, Group delay and phase delay, Elmore delay, Delay line oscillator, Electronic engineering, Electronic circuit, Line (geometry)

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