Design of 0.5V, 450μW CMOS LNA using current reuse and forward body bias technique

An integrated 5 GHz low noise amplifier suitable for ultra low voltage and ultra low power applications is designed and simulated in a standard 0.18μm CMOS technology. By employing the current reuse and forward body bias technique, the proposed LNA can operate at a reduced supply voltage and power consumption. The proposed LNA delivers a power gain (S 21 ) of 12 dB with a noise figure of 3.7 dB, while consuming only 450μW dc power with an ultra low supply voltage of 0. 5 V. The power consumption figure of merit(FOM 1 ) and the tuning-range figure of merit(FOM 2 ) are optimal at 26.67 dB/mw and 7.58(v.mw)−1, respectively.