A 0.13µm CMOS ΔΣ fractional-N synthesizer for WiMAX application
Tzu-Chan Chueh, Wei-Hsien Chen, Darong Huang
Abstract
Tzu-Chan Chueh, Wei-Hsien Chen, Darong Huang
Abstract
This paper presents a fully integrated WiMAX frequency synthesizer. This synthesizer operation frequency is from 4.4GHz to 5.5GHz. It is a ΔΣ fractional-N synthesizer. It consist of an on-chip low drop out (LDO) regulated LC-VCO, a sigma delta noise shaper, a divider, and a high linearity charge pump. This synthesizer has been implemented in 0.13µm CMOS technology and occupied 1.2mm2 area. It draws 32mA and consumes 38.4mW from a 1.2V supply. The measured out-band phase noise at 1MHz offset is −117dBc/Hz. The integrated phase noise is less than 1.25°.
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This paper presents a fully integrated WiMAX frequency synthesizer. This synthesizer operation frequency is from 4.4GHz to 5.5GHz. It is a ΔΣ fractional-N synthesizer. It consist of an on-chip low drop out (LDO) regulated LC-VCO, a sigma delta noise shaper, a divider, and a high linearity charge pump. This synthesizer has been implemented in 0.13µm CMOS technology and occupied 1.2mm2 area. It draws 32mA and consumes 38.4mW from a 1.2V supply. The measured out-band phase noise at 1MHz offset is −117dBc/Hz. The integrated phase noise is less than 1.25°.
Key concepts: Phase noise, Frequency synthesizer, CMOS, Direct digital synthesizer, Phase-locked loop, Offset (computer science), Electrical engineering, Delta-sigma modulation