Hot-carrier degradation characteristics and explanation in 0.25 μm PMOSFETs

The hot-carrier effect (HCE) of deep-submicron PMOSFETs has been investigated. It is found that the HCE includes both generation of interface states and formation of positive fixed charges in the gate oxide. We present experimental evidences showing that two degradation mechanisms are important in the case of deep-submicron PMOSFETs. Firstly, the generation of positive fixed oxide charges is significant in the case of deep-submicron PMOSFETs, which degrades the threshold voltage and even limits the transistor lifetime. For advanced analogy and mixed signal applications, process and device reliability limits need to be set up based also on threshold voltage shift, in addition to traditional methods of the transconductance degradation or gate oxide lifetime. Secondly, the generation of interface states by holes influences the device characteristics. Some speculation on the HCE formation process is included.