Effect of electromagnetic band-gap depredation by plating through hold in packaging application

In recent year, with the development of high traces density and circuit designed at high speed, signal integrity and power integrity generally paid close attention to by everybody. But up till now, there are not complete design theorems for power integrity to support the design of the high frequency and high speed system yet, especially in the design topic of System-in-Package. In this special topic, some well know electromagnetic band-gap (EBG) structures are performed on FR4 2 layer substrate in 40×40 mm size, and depredate by plating through via (PTH) to simulate effect reducing of EBG structures applied in SiP. Another, decoupling capacitors are applied on these structures for lower frequency SSN reducing. We hope to find broadband power integrity solutions by decoupling capacitors and EBG structures for system-in package substrate design.