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A 290-µW 25-kHz continuous-time delta-sigma modulator for acoustic sensor networks

Youngkil Choi, Hyungjoong Kim, Hyungdong Roh, Jeongjin Roh

Open publisher page 2 citations

Abstract

This paper presents the design of a continuous-time delta-sigma (ΔΣ) modulator for acoustic sensor networks. A feed-forward structure without a summing block is used to reduce the power consumption of the ΔΣ modulator. A high-linearity active-RC filter is used to improve the resolution of the ΔΣ modulator. A low-power, high-resolution fourth-order continuous-time ΔΣ modulator with 1-bit quantization was developed by using 0.13-μm, 1-poly 8-metal CMOS technology, with a core area of 0.58 mm2. Simulation results show that the modulator achieved 91.3-dB SNDR (signal-to-noise plus distortion ratio) over a 25-kHz signal bandwidth with an oversampling ratio of 64, while dissipating 290 μW of power from a 3.3-V supply.

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What this paper is about

This paper presents the design of a continuous-time delta-sigma (ΔΣ) modulator for acoustic sensor networks. A feed-forward structure without a summing block is used to reduce the power consumption of the ΔΣ modulator. A high-linearity active-RC filter is used to improve the resolution of the ΔΣ modulator. A low-power, high-resolution fourth-order continuous-time ΔΣ modulator with 1-bit quantization was developed by using 0.13-μm, 1-poly 8-metal CMOS technology, with a core area of 0.58 mm2. Simulation results show that the modulator achieved 91.3-dB SNDR (signal-to-noise plus distortion ratio) over a 25-kHz signal bandwidth with an oversampling ratio of 64, while dissipating 290 μW of power from a 3.3-V supply.

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Available abstract

This paper presents the design of a continuous-time delta-sigma (ΔΣ) modulator for acoustic sensor networks. A feed-forward structure without a summing block is used to reduce the power consumption of the ΔΣ modulator. A high-linearity active-RC filter is used to improve the resolution of the ΔΣ modulator. A low-power, high-resolution fourth-order continuous-time ΔΣ modulator with 1-bit quantization was developed by using 0.13-μm, 1-poly 8-metal CMOS technology, with a core area of 0.58 mm2. Simulation results show that the modulator achieved 91.3-dB SNDR (signal-to-noise plus distortion ratio) over a 25-kHz signal bandwidth with an oversampling ratio of 64, while dissipating 290 μW of power from a 3.3-V supply.

Key concepts: Delta-sigma modulation, Oversampling, CMOS, Linearity, Bandwidth (computing), Electronic engineering, Physics, Electrical engineering

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A 290-µW 25-kHz continuous-time delta-sigma modulator for acoustic sensor networks — Research Paper | ScholarLens