2002•Unpublished venueRequires access

Reliable interfacing schemes for TMR fault tolerant system

Pradeep K. Chande, A.K. Ramani

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Abstract

The design issues and implementation of a fault-tolerant multiprocessor system are addressed. Two design alternatives, fail-safe and fail-safe-redundant, are presented. The modular software presented in the earlier trimodule redundant (TMR) system is easily transportable to the proposed architecture. The results of reliability analysis for the two design schemes are presented. The proposed arbitration schemes can be integrated in LSI for improved reliability.>

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What this paper is about

The design issues and implementation of a fault-tolerant multiprocessor system are addressed. Two design alternatives, fail-safe and fail-safe-redundant, are presented. The modular software presented in the earlier trimodule redundant (TMR) system is easily transportable to the proposed architecture. The results of reliability analysis for the two design schemes are presented. The proposed arbitration schemes can be integrated in LSI for improved reliability.>

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Available abstract

The design issues and implementation of a fault-tolerant multiprocessor system are addressed. Two design alternatives, fail-safe and fail-safe-redundant, are presented. The modular software presented in the earlier trimodule redundant (TMR) system is easily transportable to the proposed architecture. The results of reliability analysis for the two design schemes are presented. The proposed arbitration schemes can be integrated in LSI for improved reliability.>

Key concepts: Computer science, Fault tolerance, Modular design, Interfacing, Reliability (semiconductor), Embedded system, Reliability engineering, Software

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