Comparison of a wide range of differential CMOS logic topologies

Most existing differential CMOS logic circuits, including ones based on pass logic, are carefully classified by topology. The breakdown of design into distinct decisions allows more meaningful performance comparisons. A study based on local comparison of the energy-delay product of basic logic functions implemented with various static differential logic families is provided as an example. Various extensions are discussed, such as a comparison with dynamic logic families, an easy way to include single-ended logic families into this comparison, including global trade-offs that are application dependent, as well as using other technologies and performance metrics.